TUT HEVC Encoder
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avx2_common_functions.h
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1/*****************************************************************************
2 * This file is part of Kvazaar HEVC encoder.
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4 * Copyright (c) 2021, Tampere University, ITU/ISO/IEC, project contributors
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32
33#ifndef AVX2_COMMON_FUNCTIONS_H
34#define AVX2_COMMON_FUNCTIONS_H
35
36#include <immintrin.h>
37
38// The calling convention used by MSVC on 32-bit builds will essentially
39// disallow functions to have more than 3 XMM/YMM parameters, because it
40// will not provide more than 8-byte param alignment, and only the first
41// three vector params will be carried in SIMD registers. Now the
42// vectorcall convention could probably be problematic in globally visible
43// funcitons, but likely not in static ones.
44#if defined _MSC_VER && defined _WIN32 && !defined _WIN64
45 #define FIX_W32 __vectorcall
46#else
47 #define FIX_W32
48#endif
49
50// Non-inline functions defined in this header are likely to trigger a
51// warning for each module including this header that does NOT use them,
52// at least on unix-ish platforms (GCC/Clang both on native Unix and MinGW).
53// Tell 'em we actually want to do that, it's not an accident.
54#if defined __GNUC__ || defined __clang__ || defined __MINGW32__ || defined __MINGW64__
55 #define FIX_UNUSED __attribute__((unused))
56#else
57 #define FIX_UNUSED
58#endif
59
60#define FIX_NOINLINE FIX_W32 FIX_UNUSED
61
62/*
63 * Reorder coefficients from raster to scan order
64 * Fun fact: Once upon a time, doing this in a loop looked like this:
65 * for (int32_t n = 0; n < width * height; n++) {
66 * coef_reord[n] = coef[scan[n]];
67 * q_coef_reord[n] = q_coef[scan[n]];
68 * }
69 */
70static INLINE void scanord_read_vector(const int16_t **__restrict coeffs, const uint32_t *__restrict scan, int8_t scan_mode, int32_t subpos, int32_t width, __m256i *result_vecs, const int n_bufs)
71{
72 // For vectorized reordering of coef and q_coef
73 const __m128i low128_shuffle_masks[3] = {
74 _mm_setr_epi8(10,11, 4, 5, 12,13, 0, 1, 6, 7, 14,15, 8, 9, 2, 3),
75 _mm_setr_epi8( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,11, 12,13, 14,15),
76 _mm_setr_epi8( 4, 5, 6, 7, 0, 1, 2, 3, 12,13, 14,15, 8, 9, 10,11),
77 };
78
79 const __m128i blend_masks[3] = {
80 _mm_setr_epi16( 0, 0, 0, -1, 0, 0, -1, -1),
81 _mm_setr_epi16( 0, 0, 0, 0, 0, 0, 0, 0),
82 _mm_setr_epi16( 0, 0, -1, -1, 0, 0, -1, -1),
83 };
84
85 const __m128i invec_rearr_masks_upper[3] = {
86 _mm_setr_epi8( 0, 1, 8, 9, 2, 3, 6, 7, 10,11, 4, 5, 12,13, 14,15),
87 _mm_setr_epi8( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,11, 12,13, 14,15),
88 _mm_setr_epi8( 0, 1, 8, 9, 4, 5, 12,13, 2, 3, 10,11, 6, 7, 14,15),
89 };
90
91 const __m128i invec_rearr_masks_lower[3] = {
92 _mm_setr_epi8(12,13, 6, 7, 0, 1, 2, 3, 14,15, 4, 5, 8, 9, 10,11),
93 _mm_setr_epi8( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,11, 12,13, 14,15),
94 _mm_setr_epi8( 4, 5, 12,13, 0, 1, 8, 9, 6, 7, 14,15, 2, 3, 10,11),
95 };
96
97 const size_t row_offsets[4] = {
98 scan[subpos] + width * 0,
99 scan[subpos] + width * 1,
100 scan[subpos] + width * 2,
101 scan[subpos] + width * 3,
102 };
103
104 for (int i = 0; i < n_bufs; i++) {
105 const int16_t *__restrict coeff = coeffs[i];
106
107 // NOTE: Upper means "higher in pixel order inside block", which implies
108 // lower addresses (note the difference: HIGH and LOW vs UPPER and LOWER),
109 // so upper 128b vector actually becomes the lower part of a 256-bit coeff
110 // vector and lower vector the higher part!
111 __m128d coeffs_d_upper;
112 __m128d coeffs_d_lower;
113
114 __m128i coeffs_upper;
115 __m128i coeffs_lower;
116
117 __m128i coeffs_rearr1_upper;
118 __m128i coeffs_rearr1_lower;
119
120 __m128i coeffs_rearr2_upper;
121 __m128i coeffs_rearr2_lower;
122
123 // Zeroing these is actually unnecessary, but the compiler will whine
124 // about uninitialized values otherwise
125 coeffs_d_upper = _mm_setzero_pd();
126 coeffs_d_lower = _mm_setzero_pd();
127
128 coeffs_d_upper = _mm_loadl_pd(coeffs_d_upper, (double *)(coeff + row_offsets[0]));
129 coeffs_d_upper = _mm_loadh_pd(coeffs_d_upper, (double *)(coeff + row_offsets[1]));
130
131 coeffs_d_lower = _mm_loadl_pd(coeffs_d_lower, (double *)(coeff + row_offsets[2]));
132 coeffs_d_lower = _mm_loadh_pd(coeffs_d_lower, (double *)(coeff + row_offsets[3]));
133
134 coeffs_upper = _mm_castpd_si128(coeffs_d_upper);
135 coeffs_lower = _mm_castpd_si128(coeffs_d_lower);
136
137 coeffs_lower = _mm_shuffle_epi8(coeffs_lower, low128_shuffle_masks[scan_mode]);
138
139 coeffs_rearr1_upper = _mm_blendv_epi8(coeffs_upper, coeffs_lower, blend_masks[scan_mode]);
140 coeffs_rearr1_lower = _mm_blendv_epi8(coeffs_lower, coeffs_upper, blend_masks[scan_mode]);
141
142 coeffs_rearr2_upper = _mm_shuffle_epi8(coeffs_rearr1_upper, invec_rearr_masks_upper[scan_mode]);
143 coeffs_rearr2_lower = _mm_shuffle_epi8(coeffs_rearr1_lower, invec_rearr_masks_lower[scan_mode]);
144
145 // The Intel Intrinsics Guide talks about _mm256_setr_m128i but my headers
146 // lack such an instruction. What it does is essentially this anyway.
147 result_vecs[i] = _mm256_inserti128_si256(_mm256_castsi128_si256(coeffs_rearr2_upper),
148 coeffs_rearr2_lower,
149 1);
150 }
151}
152
153// If ints is completely zero, returns 16 in *first and -1 in *last
154static INLINE void get_first_last_nz_int16(__m256i ints, int32_t *first, int32_t *last)
155{
156 // Note that nonzero_bytes will always have both bytes set for a set word
157 // even if said word only had one of its bytes set, because we're doing 16
158 // bit wide comparisons. No big deal, just shift results to the right by one
159 // bit to have the results represent indexes of first set words, not bytes.
160 // Another note, it has to use right shift instead of division to preserve
161 // behavior on an all-zero vector (-1 / 2 == 0, but -1 >> 1 == -1)
162 const __m256i zero = _mm256_setzero_si256();
163
164 __m256i zeros = _mm256_cmpeq_epi16(ints, zero);
165 uint32_t nonzero_bytes = ~((uint32_t)_mm256_movemask_epi8(zeros));
166 *first = ( (int32_t)_tzcnt_u32(nonzero_bytes)) >> 1;
167 *last = (31 - (int32_t)_lzcnt_u32(nonzero_bytes)) >> 1;
168}
169
170static int32_t FIX_NOINLINE hsum_8x32b(const __m256i v)
171{
172 __m256i sum1 = v;
173 __m256i sum2 = _mm256_permute4x64_epi64(sum1, _MM_SHUFFLE(1, 0, 3, 2));
174 __m256i sum3 = _mm256_add_epi32 (sum1, sum2);
175 __m256i sum4 = _mm256_shuffle_epi32 (sum3, _MM_SHUFFLE(1, 0, 3, 2));
176 __m256i sum5 = _mm256_add_epi32 (sum3, sum4);
177 __m256i sum6 = _mm256_shuffle_epi32 (sum5, _MM_SHUFFLE(2, 3, 0, 1));
178 __m256i sum7 = _mm256_add_epi32 (sum5, sum6);
179
180 __m128i sum8 = _mm256_castsi256_si128 (sum7);
181 int32_t sum9 = _mm_cvtsi128_si32 (sum8);
182 return sum9;
183}
184
185#endif
static INLINE void get_first_last_nz_int16(__m256i ints, int32_t *first, int32_t *last)
Definition avx2_common_functions.h:154
static int32_t hsum_8x32b(const __m256i v)
Definition avx2_common_functions.h:170
#define FIX_NOINLINE
Definition avx2_common_functions.h:60
static INLINE void scanord_read_vector(const int16_t **__restrict coeffs, const uint32_t *__restrict scan, int8_t scan_mode, int32_t subpos, int32_t width, __m256i *result_vecs, const int n_bufs)
Definition avx2_common_functions.h:70
#define INLINE
Definition global.h:240